The present invention evolved from efforts to develop a solid state device for high power switching applications to replace the low current circuit breaker or contactor, though the invention is of course not limited thereto. Performance requirements for such a device are demanding, and even modest specifications might include a 400 volt blocking capability with a corresponding ON state resistance of 0.05 ohms and an AC current rating 20 amps rms. Further, the system should be capable of interrupting a fault current of 5,000 amps without destroying itself. Additionally, manufacturing cost should be less than or equal to the circuit breaker or contactor cost.
High power switching in solid state devices has evolved over the last 30 years from the early milliwatt devices to the present kilowatt "hockey puck" thyristor devices. Device processing has evolved from the early restrictive alloy/rate grown devices to planar and MOS VLSI structures, bringing the blocking voltages of switches from the 10 volt level of the 1950's to the kilovolt range today. Even with these great strides, however, the problem of developing a semiconductor device to replace the low current circuit breaker or contactor has remained unsolved.
There are three likely candidates for high power switching applications. Two of these are bipolar, i.e. they depend on the flow of two types of carriers, majority and minority. The third is unipolar, i.e., it depends only on majority carrier current flow.
The first two candidates are the thyristor and the bipolar transistor. Although the thyristor is capable of blocking a high reverse voltage, it can be characterized in the forward ON state by a fixed voltage source (one junction drop) and a resistance with a negative temperature coefficient, i.e., resistance decreases with increasing temperature. The bipolar transistor can be characterized in the forward ON state simply as a resistance with a negative temperature coefficient. In each case, it is extremely difficult to accommodate large current ratings through the paralleling of bipolar devices due to the effect of "current hogging". If a number of these devices are paralleled, and if one unit draws slightly more current than the others, it will heat up and its resistance will be reduced. This results in a still larger share of the current, further heating, etc. The result is usually the thermal destruction of that device and the subsequent overloading of the others. In general, current hogging prevents paralleling of these devices unless ballast resistance, a form of stabilizing negative feedback, is introduced. This resistance further adds to the total ON state resistance and is therefore highly undesirable. Other disadvantages are false dv/dt triggering of thyristors, and secondary breakdown problems in bipolar transistors.
The third candidate, the field effect transistor (FET), is exclusively a majority carrier device. Its resistance is related to temperature through the electron mobility. Its resistance has a positive temperature coefficient, namely the resistance is proportional to T.sup.3/2. Since the electron mobility is 2.5 times greater than the hole mobility in silicon, the n channel device leads to lower ON state resistance. Further, since MOS devices give conductivity enhancement in the ON state, these devices are generally more conductive than their junction depletion-mode counterparts (JFET). Additionally, since minimal channel length (for low ON state resistance) and high packing densities are desirable, the vertical power MOS FET presently is leading all others in the power switching field.
Current commercially available MOSFETs have performance specifications approximately one order of magnitude below the minimal requirements noted above. Two current designs are the SIPMOS device and the HEXFET device, discussed more fully hereinafter.
In lateral power FETs, there is an inherent trade-off between voltage blocking capability and the lateral dimension or length of the drift region. Minimum ON state resistance demands minimum drift region length. But maximum blocking voltage commands maximum drift region length. This relationship is characterized by the equation EQU R.sub.on =kV.sub.B.sup.2.6 ohm-cm.sup.2
where R.sub.on is the ON state resistance, k is a constant (3.7.times.10.sup.-9), and V.sub.B is the blocking voltage. This relationship has been studied in the literature, C. Hu, "Optimum Doping Profile For Minimum Ohmic Resistance and High Breakdown Voltage", IEEE Transactions Electron Devices, Volume ED-26, pages 243-244, 1979.